1. Field of the Invention
The invention generally relates to semiconductor memories. In particular, the invention relates to a semiconductor memory that is configured to conserve power when performing read and write accesses.
2. Background
Semiconductor memories, such as static random access memories (SRAMs), are used in a wide variety of systems and devices. For example, SRAMS are used for data storage in a wide variety of battery-powered portable electronic devices. Power savings is a critical feature for such devices, as they are required to provide continuous operation using only a limited power source.
For some applications, the amount of data to be accessed from an SRAM may vary over time. For example, for one set of operations, only individual bytes of data may need to be accessed while for another set of operations, a larger amount of data may need to be accessed. To facilitate the larger accesses, the SRAM may be designed to accommodate reads and writes of more than a byte of data. For example, the SRAM may be designed to accommodate reads and writes of 4-byte words or 32-byte words.
However, by designing the SRAM to accommodate the larger reads and writes, power is wasted in instances where less than the largest amount of data needs to be read or written. For example, assume that the SRAM has been designed to accommodate a 32-byte read but that only a byte of data needs to be read from the SRAM. In this example, sense amplifiers associated with 256 columns of the SRAM will be activated even though data associated with only 8 columns of the SRAM needs to be read. This results in a waste of power. As a further example, assume that the SRAM has been designed to accommodate a 32-byte write but that only a byte of data needs to be written to the SRAM. In this example, write circuits associated with 256 columns of the SRAM will be activated even though data associated with only 8 columns of the SRAM needs to be written. This also results in a waste of power.
What is needed, then, is a semiconductor memory, such as an SRAM, that accommodates smaller accesses in one mode of operation and larger accesses in a second mode of operation, wherein power is conserved during the smaller accesses. Such a semiconductor memory could advantageously be used to conserve power in a system or device having a limited power supply.